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US 11,114,457 B2Granted
Semiconductor device and manufacturing method of the semiconductor device
AssigneeSK hynix Inc.
InventorJin Ha Kim
Life of this patent
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Abstract
A semiconductor device includes a stacked structure including conductive layers and insulating layers alternately stacked with each other, and a channel layer passing through the stacked structure, wherein the channel layer is a single layer, the single layer including a first GIDL region, a cell region, and a second GIDL region, and the first GIDL region has a greater thickness than each of the cell region and the second GIDL region.
Claims20
A semiconductor device, comprising:
- a stacked structure including at least one source select line, a plurality of word lines and at least one drain select line;
- and
- a channel layer passing through the stacked structure,
- wherein the channel layer is a single layer, the single layer including a first region corresponding to the source select line, a cell region corresponding to the word lines, and a second region corresponding to the drain select line, and the first region has a greater thickness than the cell region.
1 more element
A semiconductor device, comprising:
- a source layer;
- a bit line;
- and
- a memory string coupled between the source layer and the bit line, wherein the memory string includes at least one source select transistor, a plurality of memory cell transistors and at least one drain select transistor, and the at least one source select transistor, the plurality of memory cell transistors and the at least one drain select transistor share a channel layer,
- wherein the channel layer is a single layer, the single layer including a first region corresponding to the at least one source select transistor and a second region corresponding to the at least one drain select transistor, and the first region has a greater thickness than the second region.
2 more elements
A semiconductor device, comprising:
- a source layer;
- a bit line;
- and
- a channel layer coupled between the source layer and the bit line,
- wherein the channel layer is a single layer, the single layer including a first region and a second region, the first region is adjacent to the source layer, the second region is adjacent to the bit line, and the first region has a greater thickness than the second region, and
- wherein the channel layer has a flat outer surface and a step-like inner surface.
3 more elements
Dependencies are inferred from the claim text.