FinFET having locally higher fin-to-fin pitch

A semiconductor fin device comprising:

• at least three fins including first to third fins protruding from a substrate and arranged to extend in parallel in a first direction and further arranged to laterally alternate in a second direction with a plurality of shallow trench isolation structures, wherein each of the at least three fins is separated from an immediately adjacent one of the at least three fins by a first fin spacing and by one of the shallow trench isolation structures, and wherein immediately adjacent ones of the shallow trench isolation structures are discretely separated from each other in the second direction by one of the at least three fins,
• wherein at least a portion of each of the first fin and the second fin of the at least three fins vertically protrudes to substantially the same vertical level higher than upper surfaces of the shallow trench isolation structures immediately adjacent to a respective one of the each of the first fin and the second fin, and
• wherein the third fin is formed laterally between the first fin and the second fin in the second direction, the third fin having a non-protruding region which extends vertically to a level below or equal to upper surfaces of the shallow trench isolation structures immediately adjacent to the third fin;
• and
• a first gate dielectric that is conformal with respect to topmost surfaces and upper sidewall portions of the first and second fins,
• wherein the first gate dielectric has the same composition at portions contacting each of the first, second and third fins, and
• wherein the at least three fins comprise a plurality of third fins including the third fin, wherein each of the third fins is formed laterally between the first fin and the second fin in the second direction, and wherein each of the third fins has a respective non-protruding region which extends vertically to a level below or equal to upper surfaces of the shallow trench isolation structures immediately adjacent to a respective one of the third fins.

A method of fabricating a semiconductor fin device, the method comprising:

• forming at least three fins including first to third fins protruding from a substrate and arranged to extend in parallel in a first direction and further arranged to laterally alternate in a second direction with a plurality of shallow trench isolation structures, wherein each of the at least three fins is separated from an immediately adjacent one of the at least three fins by a first fin spacing and by one of the shallow trench isolation structures, and wherein immediately adjacent ones of the shallow trench isolation structures are discretely separated from each other in the second direction by one of the at least three fins,
• wherein forming the at least three fins comprises forming the first fin and the second fin such that at least a portion of each of the first fin and the second fin vertically protrudes to substantially the same vertical level higher than upper surfaces of the shallow trench isolation structures immediately adjacent to a respective one of the each of the first fin and the second fin,
• wherein forming the at least three fins further comprises forming the third fin laterally between the first and the second fin in the second direction, and
• selectively removing at least a portion of the third fin such that the third fin is removed to a level below or equal to the upper surfaces of the shallow trench isolation structures immediately adjacent to the third fin, thereby forming a non-protruding region between the first fin and the second fin;
• and
• forming a first gate dielectric that is conformal with respect to topmost surfaces and upper sidewall portions of the first and second fins,
• wherein the first gate dielectric has the same composition at portions contacting each of the first, second and third fins,
• wherein the first gate dielectric overlaps and contacts a topmost portion of the third fin in the non-protruding region and immediately adjacent ones of the shallow trench isolation structures with respect to the third fin, and wherein the first gate dielectric contacting sidewalls of the first fin and sidewalls of the second fin has a thickness measured in the second direction that is at least half of the first fin spacing.