Protection circuit with a FET device coupled from a protected bus to ground
AssigneeSemtech Corporation
InventorsLei Hua, William Allen Russell, Changjun Huang, Bo Liang, Pengcheng Han
Life of this patent
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AssigneeSemtech Corporation
InventorsLei Hua, William Allen Russell, Changjun Huang, Bo Liang, Pengcheng Han
Estimating the term…
A semiconductor device includes a voltage input circuit node and a ground voltage node. A first transistor is coupled between the voltage input circuit node and the ground voltage node. A triggering circuit is coupled between the voltage input circuit node and the ground voltage node in parallel with the first transistor. The triggering circuit includes a trigger diode. An output of the triggering circuit is coupled to a control terminal of the first transistor. A load is powered by coupling the load between the voltage input circuit node and the ground voltage node.
A semiconductor device, comprising:
A semiconductor device, comprising:
A method of electrical-overstress protection, comprising:
Dependencies are inferred from the claim text.