3D semiconductor processor and memory device and structure
AssigneeMonolithic 3D Inc.
InventorsZvi Or-Bach, Jin-Woo Han
Life of this patent
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Abstract
A 3D semiconductor device, the device including: a first level including first single crystal transistors; and a second level including second single crystal transistors, where the first level is overlaid by the second level, where a vertical distance from the first single crystal transistors to the second single crystal transistors is less than four microns, where the first level includes a plurality of processors, and where the second level includes a plurality of memory cells.
Claims20
A 3D semiconductor device, the device comprising:
- a first level comprising first single crystal transistors;
- and
- a second level comprising second single crystal transistors,
- wherein said first level is overlaid by said second level,
- wherein a vertical distance from said first single crystal transistors to said second single crystal transistors is less than four microns,
- wherein said first level comprises a plurality of processors, and
- wherein said second level comprises a plurality of memory cells.
A 3D semiconductor device, the device comprising:
- a first level comprising first single crystal transistors;
- and
- a second level comprising second single crystal transistors,
- wherein said first level is overlaid by said second level,
- wherein a vertical distance from said first single crystal transistors to said second single crystal transistors is less than four microns,
- wherein said first level comprises at least one processor,
- wherein said second level comprises a plurality of memory cells, and
- wherein at least one of said memory cells is flash type memory cell.
A 3D semiconductor device, the device comprising:
- a first level comprising first single crystal transistors;
- and
- a second level comprising second single crystal transistors,
- wherein said first level is overlaid by said second level,
- wherein a vertical distance from said first single crystal transistors to said second single crystal transistors is less than four microns,
- wherein said first level comprises at least one processor,
- wherein said second level comprises a plurality of memory cells, and
- wherein said second level is a layer transferred and bonded level.
Dependencies are inferred from the claim text.