Through-silicon via (TSV) test circuit, TSV test method and integrated circuits (IC) chip

An integrated circuit (IC) with a through-silicon via (TSV) test circuit, comprising a first TSV, a second TSV and a phase detector,

• a first end of the first TSV coupled to a predetermined signal output, and a second end of the first TSV coupled to a first end of the second TSV,
• a second end of the second TSV coupled to a first input of the phase detector,
• a second input of the phase detector coupled to the predetermined signal output,
• wherein the phase detector is configured to determine a phase difference between a signal at the first input of the phase detector and a signal at the second input of the phase detector, and wherein a test result is determined by comparing the phase difference with a predetermined threshold,
• a first selector and a first distributor, the first selector comprising a first input, a second input, a control terminal and an output, the first distributor comprising an input, a control terminal, a first output and a second output,
• the first input of the first selector configured to receive a first operational signal to be input to the first TSV, the second input of the first selector coupled to the predetermined signal output, the control terminal of the first selector configured to receive a first test control signal, the output of the first selector coupled to the first end of the first TSV,
• the input of the first distributor coupled to the second end of the first TSV, the control terminal of the first distributor configured to receive the first test control signal, the first output of the first distributor coupled to the first end of the second TSV, the second output of the first distributor coupled to an active component associated with the first operational signal.

A through-silicon via (TSV) test method, comprising:

• inputting a predefined signal to a phase detector, the predefined signal being a first signal wherein the phase detector comprises a first input and a second input, and the first signal is input to the second input of the phase detector;
• inputting the predefined signal, as an input signal of a first TSV, to the first TSV, wherein the first TSV is the TSV whose working condition to be tested;
• inputting, via a second TSV, an output signal from the first TSV to the phase detector, the output signal from the first TSV being a second signal, wherein the second signal is input to the first input of the phase detector;
• determining, by the phase detector, a phase difference between the first signal and the second signal;
• determining a test result by comparing the phase difference with a predetermined threshold;
• transmitting, in response to the input signal of the first TSV being an operational signal, the phase difference between the first signal and the second signal to a phase calibrator in a stacked tier associated with a second end of the first TSV;
• and
• applying, by the phase calibrator, a delay compensation to the operational signal.