Semiconductor package substrate and method of manufacturing semiconductor package using the same

A semiconductor package substrate comprising:

• a semiconductor chip comprising a connection pad;
• an encapsulant encapsulating at least a portion of the semiconductor chip;
• a connection member disposed on the semiconductor chip and the encapsulant, the connection member comprising a redistribution layer that is electrically connected to the connection pad;
• a first passivation layer disposed on the connection member;
• and
• an adhesive layer disposed on at least one of a top surface of the encapsulant and a bottom surface of the first passivation layer in a region outside of the semiconductor chip;
• a frame comprising a through-portion, the semiconductor chip being disposed in the through-portion, and the encapsulant filling at least a portion of the through-portion,
• wherein the frame comprises:
• a first insulating layer disposed in contact with a first surface of the connection member
• a first wiring layer disposed in contact with the first surface of the connection member and embedded in the first insulating layer,
• a second wiring layer disposed on a side of the first insulating layer opposing a side in which the first wiring layer is embedded,
• a second insulating layer disposed on the side of the first insulating layer opposing the side in which the first wiring layer is embedded, the second insulating layer covering at least a portion of the second wiring layer, and
• a third wiring layer disposed on a side of the second insulating layer opposing a side in which the second wiring layer is embedded, and
• wherein a surface of the first insulating layer, disposed in contact with the first surface of the connection member, has a step structure with respect to a surface of the first wiring layer disposed in contact with the first surface of the connection member.

A semiconductor package substrate comprising:

• a semiconductor chip comprising a connection pad;
• an encapsulant encapsulating at least a portion of the semiconductor chip;
• a connection member disposed on the semiconductor chip and the encapsulant, the connection member comprising a redistribution layer that is electrically connected to the connection pad;
• a first passivation layer disposed on the connection member;
• and
• an adhesive layer disposed on at least one of a top surface of the encapsulant and a bottom surface of the first passivation layer in a region outside of the semiconductor chip;
• a frame comprising a through-portion, the semiconductor chip being disposed in the through-portion, and the encapsulant filling at least a portion of the through-portion,
• wherein the frame comprises:
• a first insulating layer,
• a first wiring layer and a second wiring layer respectively disposed on opposing surfaces of the first insulating layer,
• a second insulating layer and a third insulating layer respectively disposed on the opposing surfaces of the first insulating layer, and respectively covering at least a portion of the first wiring layer and at least a portion of the second wiring layer,
• a third wiring layer disposed on a side of the second insulating layer opposing a side in which the first wiring layer is embedded, and
• a fourth wiring layer disposed on a side of the third insulating layer opposing a side in which the second wiring layer is embedded, and
• wherein a thickness of the first insulating layer is greater than a thickness of each of the second insulating layer and the third insulating layer.