Method for fabricating shallow trench isolation

A method for fabricating semiconductor device, comprising:

• forming a pad layer on a substrate, wherein the pad layer comprises:
• a first pad layer on the substrate;
• and
• a second pad layer on the first pad layer;
• removing part of the pad layer and the substrate to form a trench;
• forming a liner in the trench after removing part of the pad layer;
• performing a nitridation process to divide the liner into a first portion and a second portion, wherein the second portion comprises a lateral extending portion covering an end portion of the first portion and flush with a top surface of the substrate;
• after the nitridation process, forming a dielectric layer to fill the trench;
• performing a planarizing process to remove the dielectric layer so that the top surfaces of the dielectric layer and the pad layer are coplanar;
• removing the second pad layer;
• after removing the second pad layer, performing a dry etching process to remove the first pad layer, part of the liner, and part of the dielectric layer at the same time to form a shallow trench isolation (STI), wherein the dry etching process comprises a non-plasma etching process, and after the dry etching process, a top surface of the liner comprises a curve, and a top surface of the dielectric layer comprises a planar surface that is flush with the top surface of the substrate;
• and
• performing an anneal process to remove residues on a top surface of the substrate after removing the first pad layer and part of the dielectric layer.