Reference voltage training circuit and semiconductor apparatus including the same
AssigneeSK hynix Inc.
InventorHee Jun Kim
Life of this patent
Estimating the term…
Abstract
A reference voltage training circuit may include: a normal buffer configured to generate a first received signal by receiving one of differential signals based on the other; a calibration signal generation circuit configured to generate a second received signal by receiving the one of the differential signals according to a reference voltage, and generate reference voltage calibration signals by comparing the phase of the second received signal to the phase of the first received signal; and a reference voltage generation circuit configured to calibrate the level of the reference voltage according to the reference voltage calibration signals.
Claims20
A reference voltage training circuit comprising:
- a normal buffer configured to generate a first received signal by receiving one of two differential signals based on the other of the two differential signals;
- a calibration signal generation circuit configured to generate a second received signal by receiving the one of the differential signals according to a reference voltage, and generate reference voltage calibration signals by comparing a phase of the second received signal with a phase of the first received signal;
- and
- a reference voltage generation circuit configured to calibrate a level of the reference voltage according to the reference voltage calibration signals.
A semiconductor apparatus comprising:
- a differential signal receiving circuit configured to generate reference voltage calibration signals according to differential signals and a reference voltage;
- a data receiving circuit configured to receive data transmitted from an external semiconductor apparatus according to the reference voltage;
- and
- a reference voltage generation circuit configured to calibrate a level of the reference voltage according to the reference voltage calibration signals.
A reference voltage training circuit comprising:
- first circuitry configured to generate a first signal by comparing levels of differential signals;
- second circuitry configured to generate a second signal by comparing a level of a reference signal with a level of one of the differential signals;
- third circuitry configured to generate a calibration code by comparing phases of the first and second signals;
- and
- fourth circuitry configured to move, according to the calibration code, a level of the reference signal toward a mid-level of the differential signals.
Dependencies are inferred from the claim text.