Smart gate display logic

A display device capable of reduced power consumption, the display device comprising:

• a display panel comprising a plurality of pixels;
• a display logic for receiving pixel data corresponding to indicating input values for the plurality of pixels;
• and
• a display logic bypass system comprising:
• a comparator and a counter for determining, for a single image frame, that a number of consecutive pixels having consecutive identical input values exceeds a threshold number,
• wherein the display logic bypass system is configured to power down the display logic.

A non-transitory computer readable medium implemented on a display device comprising a display logic for processing pixel data, and a display panel comprising a plurality of pixels, the non-transitory computer readable medium having computer code that, when executed on a processor, implements a method of reducing power consumption, the method comprising:

• receiving the pixel data indicating input values for the plurality of pixels;
• counting a number of consecutive pixels of the plurality of pixels that have consecutive identical input values;
• determining, for a single image frame, that the number of consecutive pixels exceeds a threshold number;
• and
• powering down the display logic.

A method of reducing power consumption by a display device comprising a display logic for processing pixel data, and a display panel comprising a plurality of pixels, the method comprising:

• receiving the pixel data indicating input values for the plurality of pixels;
• determining, for a single image frame, a number of consecutive pixels of the plurality of pixels having consecutive identical input values, the consecutive pixels being in a common row, exceeds a threshold number;
• and
• powering down the display logic.