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US 11,114,037 B1Granted
Gate driver on array (GOA) circuit and display apparatus
OwnerLiuqi Zhanginventor
Life of this patent
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Abstract
Embodiments of the application provide a gate driver on array (GOA) circuit and a display apparatus, which is capable of outputting signals of negative pulse waveforms using a simplified circuit design and improving output capability of the GOA circuit by changing a high voltage level of a clock signal to a voltage level of a first high level signal. Thus, the GOA circuit is improved by the first capacitor and the second capacitor, which make the GOA circuit more stable.
Claims20
A gate driver on array (GOA) circuit, comprising:
- a multi-stage cascade of GOA units, each of which includes:
- an input module, an inversion module, a clamping module, a first output module, a second output module, and an output control module;
- the input module is connected to a current stage clock signal and a prior stage transmitted signal, and electrically connected to a first node, and is configured to output the prior stage transmitted signal to the first node under control of the current stage clock signal;
- the inversion module is electrically connected to a second node and the first node, and is configured to control a voltage level of the second node under control of a voltage level of the first node;
- the clamping module is connected to a low level signal and electrically connected to the second node and the first node, and is configured to maintain the voltage level of the first node at a voltage level of the low level signal under control of the voltage level of the second node;
- the first output module is connected to the current stage clock signal and electrically to the second node, and is configured to output a current stage transmitted signal under control of the voltage level of the second node;
- the second output module is connected to the current stage clock signal and electrically connected to the second node, and is configured to output a current stage scanning signal under control of the voltage level of the second node;
- the output control module is connected to a first high level signal and a second high level signal, and electrically to the first node, the current stage scanning signal, and the current stage transmitted signal, and is configured to pull the current stage transmitted signal up to a voltage level of the first high level signal, and the current stage scanning signal up to a voltage level of the second high level signal under control of the voltage level of the first node;
- wherein the voltage level of the first high level signal is greater than the voltage level of the second high level signal, and a high voltage level of the current stage clock signal is equal to the voltage level of the first high level signal;
- the GOA circuit further comprises an eleventh transistor, a gate terminal and a source terminal of the eleventh transistor are connected to a reset signal, and a drain terminal of the eleventh transistor is connected to the first node;
- the GOA circuit further comprises a first capacitor and a second capacitor;
- a first terminal of the first capacitor is electrically connected to the first node, and a second terminal of the first capacitor is electrically connected to a next stage transmitted signal;
- a first terminal of the second capacitor is electrically connected to the current stage clock signal, and a second terminal of the second capacitor is electrically connected to the current stage transmitted signal.
10 more elements
A gate driver on array (GOA) circuit, comprising:
- a multi-stage cascade of GOA units, each of which includes:
- an input module, an inversion module, a clamping module, a first output module, a second output module, and an output control module;
- the input module is connected to a current stage clock signal and a prior stage transmitted signal, and electrically connected to a first node, and is configured to output the prior stage transmitted signal to the first node under control of the current stage clock signal;
- the inversion module is electrically connected to a second node and the first node, and is configured to control a voltage level of the second node under control of a voltage level of the first node;
- the clamping module is connected to a low level signal and electrically connected to the second node and the first node, and is configured to maintain the voltage level of the first node at a voltage level of the low level signal under control of the voltage level of the second node;
- the first output module is connected to the current stage clock signal and electrically to the second node, and is configured to output a current stage transmitted signal under control of the voltage level of the second node;
- the second output module is connected to the current stage clock signal and electrically connected to the second node, and is configured to output a current stage scanning signal under control of the voltage level of the second node;
- the output control module is connected to a first high level signal and a second high level signal, and electrically to the first node, the current stage scanning signal, and the current stage transmitted signal, and is configured to pull the current stage transmitted signal up to a voltage level of the first high level signal, and the current stage scanning signal up to a voltage level of the second high level signal under control of the voltage level of the first node;
- wherein the voltage level of the first high level signal is greater than the voltage level of the second high level signal, and a high voltage level of the current stage clock signal is equal to the voltage level of the first high level signal.
6 more elements
A display apparatus, comprising:
- a gate driver on array (GOA) circuit comprising a multi-stage cascade of GOA units, each of which includes:
- an input module, an inversion module, a clamping module, a first output module, a second output module, and an output control module;
- the input module is connected to a current stage clock signal and a prior stage transmitted signal, and electrically connected to a first node, and is configured to output the prior stage transmitted signal to the first node under control of the current stage clock signal;
- the inversion module is electrically connected to a second node and the first node, and is configured to control a voltage level of the second node under control of a voltage level of the first node;
- the clamping module is connected to a low level signal and electrically connected to the second node and the first node, and is configured to maintain the voltage level of the first node at a voltage level of the low level signal under control of the voltage level of the second node;
- the first output module is connected to the current stage clock signal and electrically to the second node, and is configured to output a current stage transmitted signal under control of the voltage level of the second node;
- the second output module is connected to the current stage clock signal and electrically connected to the second node, and is configured to output a current stage scanning signal under control of the voltage level of the second node;
- the output control module is connected to a first high level signal and a second high level signal, and electrically to the first node, the current stage scanning signal, and the current stage transmitted signal, and is configured to pull the current stage transmitted signal up to a voltage level of the first high level signal, and the current stage scanning signal up to a voltage level of the second high level signal under control of the voltage level of the first node;
- wherein the voltage level of the first high level signal is greater than the voltage level of the second high level signal, and a high voltage level of the current stage clock signal is equal to the voltage level of the first high level signal.
6 more elements
Dependencies are inferred from the claim text.