Shift register, method for driving same, gate driving circuit, and display device

A circuit comprising:

• an input sub-circuit coupled to a first clock signal terminal, an input signal terminal and a feedback node, and configured to transmit an input signal from the input signal terminal to the feedback node under the control of a first clock signal from the first clock signal terminal;
• a pull-up node control sub-circuit coupled to the first clock signal terminal, the feedback node and a pull-up node, and configured to transmit a feedback signal of the feedback node to the pull-up node under the control of a first clock signal from the first clock signal terminal;
• a feedback sub-circuit coupled to the pull-up node, a first voltage signal terminal and the feedback node, and configured to transmit a first voltage signal from the first voltage signal terminal to the feedback node under the control of the pull-up node;
• an output sub-circuit coupled to the pull-up node, a second clock signal terminal and an output signal terminal, and configured to transmit a second clock signal from the second clock signal terminal to the output signal terminal under the control of the pull-up node;
• and
• a pull-down sub-circuit coupled to a pull-down node, a second voltage signal terminal and the output signal terminal, and configured to transmit a second voltage signal from the second voltage signal terminal to the output signal terminal under the control of the pull-down node.