Line-based chip card tamper detection

A payment reader for exchanging payment information with a chip card and for providing decoy data to a tamper device connected to a chip card interface of the payment reader, comprising:

• a chip card interface comprising at least a voltage interface, a reset interface, a clock interface,
• an input/output interface, a ground interface, and a programming interface;
• a processing unit coupled to the chip card interface and configured to execute instructions;
• a plurality of chip card lines coupled between the chip card interface and the processing unit, comprising:
• a voltage line coupled between the voltage interface and the processing unit;
• a reset line coupled between the reset interface and the processing unit;
• a clock line coupled between the clock interface and the processing unit;
• an input/output line coupled between the input/output interface and the processing unit;
• a ground line coupled between the ground interface and the processing unit;
• and
• a programming line coupled between the programming interface and the processing unit;
• and
• the input/output interface comprising:
• a reader communication circuit coupled to the input/output line, the reader communication circuit configured to operate at a first clock frequency;
• a card communication circuit coupled to the input/output line, the card communication circuit configured to operate at a second clock frequency;
• a memory having the instructions stored thereon and coupled to provide the instructions to the processing unit, wherein the instructions cause the processing unit to:
• transmit data over the input/output line with the card communication circuit at the second clock frequency;
• read data from the input/output line with the reader communication circuit at the first clock frequency;
• and
• transmit decoy data over the input/output line with the reader communication circuit after expiration of a first period for the first clock frequency and before an expiration of a second period for the second clock frequency.