An apparatus for protecting a program counter structure of a processor system in case of an interrupt request, the processor system comprising at least the program counter structure, an interrupt control device, and a memory, the interrupt control device configured to respond to the interrupt request by providing the program counter structure with an address associated with the interrupt request, the address being one of an interrupt vector and a starting address of the interrupt routine associated with the interrupt request, and the program counter structure configured to output the address to a memory interface with respect to the memory, the apparatus comprising:
- an interface configured to read in the address from the memory interface;
- a comparing device configured to compare the address with a target address assigned to the interrupt request, in order to obtain a comparison result;
- and
- an outputting device configured to provide a match signal based on the comparison result.