Partial execution of a write command from a host system
AssigneeMicron Technology, Inc.
InventorsSanjay Subbarao, Mark Ish
Life of this patent
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AssigneeMicron Technology, Inc.
InventorsSanjay Subbarao, Mark Ish
Estimating the term…
A memory sub-system configured to partially execute write commands from a host system to optimize performance. After receiving a write command from a host system, the memory sub-system can identify, based on a media physical layout, a preferred input/output size for the execution of the write command. The memory sub-system can execute the write command according to the preferred input/output size, configure a response for the write command to identify the second input/output size, and transmit the response identifying the second input/output size to the host system. The host system is configured to generate a subsequent write command to write at least the data that is initially identified in the write command that has been executed but not been included in the execution of the write command performed according to the preferred input/output size.
A method, comprising:
A non-transitory computer storage medium storing instructions which, when executed in a memory sub-system, causes the memory sub-system to perform a method, the method comprising:
A memory sub-system, comprising:
Dependencies are inferred from the claim text.