On-chip parameter generation system with an integrated calibration circuit
AssigneeMarvell Asia Pte Ltd
InventorsEric Hunt-Schroeder, Alexander J. Filmer
Life of this patent
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AssigneeMarvell Asia Pte Ltd
InventorsEric Hunt-Schroeder, Alexander J. Filmer
Estimating the term…
Disclosed are embodiments of an integrated circuit (IC) chip that includes an on-chip parameter generation system. The system includes multiple parameter generators (e.g., voltage generators, current generators, capacitance generators, etc.) and an integrated calibration circuit. The calibration circuit is configured to automatically, sequentially, and repeatedly calibrate the parameter generators in order to minimize chip-to-chip variations in parameters supplied to other on-chip components under real world operating conditions throughout the life of the IC chip. In other words, the integrated calibration circuit effectively minimizes temperature-induced chip-to-chip variations, age-induced chip-to-chip variations, etc. in parameters generated by the on-chip parameter generators. Also disclosed herein are embodiments of an associated method.
An integrated circuit chip comprising:
An integrated circuit chip comprising:
A method comprising:
Dependencies are inferred from the claim text.