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US 11,030,141 B2Granted
Apparatuses for independent tuning of on-die termination impedances and output driver impedances, and related methods, semiconductor devices, and systems
AssigneeMicron Technology, Inc.
InventorElancheren Durai
Life of this patent
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Abstract
An apparatus may include at least one output circuit configured to generate a desired output driver impedance (ODI) during a first operational mode. The least one output circuit may further be configured to independently generate a desired on-die termination (ODT) impedance during a second operational mode. Memory systems, memory devices, electronic systems, and related methods of operation are also described.
Claims19
An apparatus, comprising:
- at least one circuit configured to:
- receive at least one signal indicative of an operational mode of the apparatus;
- generate, via activating at least one tuning device, a desired output driver impedance (ODI) value in response to the operational mode being a first operational mode;
- and
- generate, via activating at least one other tuning device, a desired on-die termination (ODT) impedance value in response to the operational mode being a second operational mode.
2 more elements
A semiconductor device, comprising:
- at least one circuit including a number of tuning devices and configured to:
- tune, via at least one tuning device of the number of tuning devices of the at least one circuit, at least one impedance value of the semiconductor device responsive to the semiconductor device being in a first mode during a first read operation;
- and
- tune, via at least one other tuning device of the number of tuning devices, the at least one impedance value of the semiconductor device responsive to the semiconductor device being in a second mode during a second, different read operation.
1 more element
A system, comprising:
- at least one input device;
- at least one output device;
- at least one processor device operably coupled to the input device and the output device;
- and
- at least one memory system operably coupled to the at least one processor device, the memory system comprising:
- a first memory device configured to generate a first impedance based on a first parameter in response to the first memory device operating in a drive mode;
- and
- at least one second memory device configured to generate a second impedance based on a second, different parameter in response to the at least one second memory device operating in a termination mode.
5 more elements
A method, comprising:
- determining an operational mode of each of a first device and at least one second device;
- tuning, via at least one tuning device, an output driver impedance (ODI) value of the first device in response to the first device operating in a first operational mode;
- and
- tuning, via at least one other tuning device, an on-die termination (ODT) value of the at least one second device in response to the at least one second device operating in a second operational mode.
1 more element
Dependencies are inferred from the claim text.