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US 11,030,088 B2Granted
Pseudo main memory system
AssigneeSamsung Electronics Co., Ltd.
InventorsKrishna T. Malladi, Jongmin Gim, Hongzhong Zheng
Life of this patent
Estimating the term…
Abstract
A pseudo main memory system. The system includes a memory adapter circuit for performing memory augmentation using compression, deduplication, and/or error correction. The memory adapter circuit is connected to a memory, and employs the memory augmentation methods to increase the effective storage capacity of the memory. The memory adapter circuit is also connected to a memory bus and implements an NVDIMM-F or modified NVDIMM-F interface for connecting to the memory bus.
Claims20
A system comprising:
- a processor;
- a memory system comprising:
- an adapter module;
- and
- a first memory;
- and
- a second memory connected to the processor through a management module,
- wherein the adapter module has a first interface connected to the processor and a second interface connected to the first memory,
- wherein the adapter module is configured to store data in, and retrieve data from, the first memory, utilizing a change of a storage capacity of the first memory, the change being configured to modify free memory of the first memory according to a ratio,
- wherein the adapter module is further configured to estimate the ratio as an estimated ratio, and
- wherein the processor is further configured to assess that sufficient space is available in the first memory based on the estimated ratio, the estimated ratio being a function of augmentation ratios for data stored in the first memory over an interval of time.
8 more elements
A method for operating a computer system, the computer system comprising:
- a processor;
- a memory system comprising:
- an adapter module;
- and
- a first memory;
- and
- a second memory connected to the processor through a management module,
- the adapter module having a first interface connected to the processor and a second interface connected to the first memory, and
- the method comprising storing data in, and retrieving data from, the first memory, utilizing change of a storage capacity of the first memory, the change being configured to modify free memory of the first memory according to an ratio,
- wherein the adapter module is configured to estimate the ratio as an estimated ratio, and
- wherein the processor is further configured to assess that sufficient space is available in the first memory based on the estimated ratio, the estimated ratio being a function of augmentation ratios for data stored in the first memory over an interval of time.
8 more elements
A system comprising:
- a processor;
- a memory system comprising:
- a first memory;
- and
- memory adapter means for storing data in, and retrieving data from, the first memory, utilizing change of a storage capacity of the first memory, the change being configured to modify free memory of the first memory according to a ratio, the memory adapter means being configured to estimate the ratio as an estimated ratio,
- the memory adapter means having a first interface connected to the processor and a second interface connected to the first memory,
- the first interface being an NVDIMM-F interface, and
- the system being configured to operate the memory system as a block device,
- wherein the system further comprises:
- a second memory connected to the processor through a management module,
- wherein the processor is further configured to assess that sufficient space is available in the first memory based on the estimated ratio, the estimated ratio being a function of augmentation ratios for data stored in the first memory over an interval of time.
8 more elements
Dependencies are inferred from the claim text.