Enhanced address space layout randomization
AssigneeIntel Corporation
InventorsTomer Stark, Ron Gabor, Joseph Nuzman
Life of this patent
Estimating the term…
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AssigneeIntel Corporation
InventorsTomer Stark, Ron Gabor, Joseph Nuzman
Estimating the term…
One embodiment provides an apparatus. The apparatus includes a linear address space, metadata logic and enhanced address space layout randomization (ASLR) logic. The linear address space includes a metadata data structure. The metadata logic is to generate a metadata value. The enhanced ASLR logic is to combine the metadata value and a linear address into an address pointer and to store the metadata value to the metadata data structure at a location pointed to by a least a portion of the linear address. The address pointer corresponds to an apparent address in an enhanced address space. A size of the enhanced address space is greater than a size of the linear address space.
An enhanced address space memory corruption detection apparatus, comprising:
An enhanced address space memory corruption detection method, comprising:
An enhanced address space memory corruption detection system, comprising:
Dependencies are inferred from the claim text.