Entering protected pipeline mode without annulling pending instructions

A processor, comprising:

• an instruction execution pipeline having a plurality of pipeline stages;
• and
• pipeline circuitry configured to:
• receive a first instruction for execution on an instruction execution pipeline, wherein the instruction execution pipeline is in a first execution mode, and wherein the first instruction is configured to utilize a first memory location;
• initialize a lifetime tracking value of the first instruction to represent an expected number of cycles for the execution of the first instruction;
• begin the execution of the first instruction on the instruction execution pipeline;
• receive an execution mode instruction to switch the instruction execution pipeline to a second execution mode;
• adjust the lifetime tracking value based on the received execution mode instruction;
• switch the instruction execution pipeline to the second execution mode based on the received execution mode instruction;
• receive a second instruction for execution on the instruction execution pipeline, the second instruction configured to utilize the first memory location;
• cause hazard detection logic to determine that the first instruction and the second instruction utilize the first memory location based on the lifetime tracking value having been adjusted;
• and
• stall the execution of the second instruction based on the hazard detection logic.

A processing system comprising:

• a memory;
• and
• a processor comprising:
• an instruction execution pipeline having a plurality of pipeline stages;
• and
• pipeline circuitry configured to:
• receive a first instruction for execution on an instruction execution pipeline, wherein the instruction execution pipeline is in a first execution mode, and wherein the first instruction is configured to utilize a first memory location;
• prior to the execution of the first instruction, set a lifetime tracking value of the first instruction based on an expected time for the execution of the first instruction;
• begin the execution of the first instruction on the instruction execution pipeline;
• receive an execution mode instruction to switch the instruction execution pipeline to a second execution mode;
• adjust the lifetime tracking value to a predetermined value based on the received execution mode instruction;
• switch the instruction execution pipeline to the second execution mode based on the received execution mode instruction;
• receive a second instruction for execution on the instruction execution pipeline, the second instruction configured to utilize the first memory location;
• determine that the first instruction and the second instruction utilize the first memory location based on the lifetime tracking value having been adjusted to the predetermined value;
• and
• stall execution of the second instruction based on the determining.