US 11,029,973 B1 · Logic for configuring processors in a server computer

Abstract

A server computer can have multiple potential configurations depending on a state of an input signal. In a first potential configuration, a single-platform model is used with multiple processors booted using a single BIOS. The multiple processors can have a bus there between allowing processor-to-processor communication. In a second potential configuration, a multi-platform model is used with multiple processors booted using separate BIOS. In this configuration, the bus between the processors is disabled so that the platforms operate autonomously. The hardware can be extended to support additional processors, such as 4, 8, etc. A failover mode also allows the hardware to detect a hardware error (e.g., bus error) and dynamically reconfigure the processors to use an alternative bus. With the failover, the addressing of the processors can be modified to reconfigure the server computer to compensate for the hardware error.

Claims19

Dependent claims

A method of configuring first and second processors in a server computer, the method comprising:

receiving a first configuration signal in configuration logic, the first configuration signal indicating that the server computer is to be configured in a single-partition;
in response to the first configuration signal:
setting a first processor to a first address and a second processor to a second address, different than the first address;
configuring a first bus between the first and second processor so as to enable communication there between;
configuring a second bus between the first processor and the configuration logic;
and
programming the first and second processors using a first BIOS;
receiving a second configuration signal in the configuration logic, the second configuration signal indicating that the server computer is to be configured in a multiple partition setup;
in response to the second configuration signal:
setting the first processor to a first address and the second processor to the first address;
configuring the first bus between the first and second processors to disable communication there between;
and
programming the first processor using the first BIOS and the second processor using a second BIOS.

10 more elements

Dependencies are inferred from the claim text.

Logic for configuring processors in a server computer

Life of this patent

Logic for configuring processors in a server computer

Life of this patent

Abstract

Claims19