Apparatus and method for widened SIMD execution within a constrained register file

A method comprising:

• dispatching instructions of a thread for execution, the instructions including a first instruction to indicate a start of a double execution instruction sequence and a second instruction to indicate an end of a double execution instruction sequence;
• and
• executing on single instruction multiple data (SIMD) circuitry the double execution instruction sequence in a first pass using a first set of lanes of the SIMD circuitry;
• executing the double execution instruction sequence in a second pass following the first pass using a second set of lanes of the SIMD circuitry without the first and second sets of lanes being overlapped, in response to executing the second instruction for a first number of times;
• and
• executing further instructions using both first and second sets of lanes, in response to executing the second instruction for a second number of times.

A non-transitory machine-readable medium having program code stored thereon which, when executed by a machine, causes the machine to perform the operations of:

• dispatching instructions of a thread for execution, the instructions including a first instruction to indicate a start of a double execution instruction sequence and a second instruction to indicate an end of a double execution instruction sequence;
• and
• executing on single instruction multiple data (SIMD) circuitry the double execution instruction sequence in a first pass using a first set of lanes of the SIMD circuitry;
• executing the double execution instruction sequence in a second pass following the first pass using a second set of lanes of the SIMD circuitry without the first and second sets of lanes being overlapped, in response to executing the second instruction for a first number of times;
• and
• executing further instructions using both first and second sets of lanes, in response to executing the second instruction for a second number of times.