Credit based command scheduling

A memory system comprising:

• a memory controller having:
• a bank command scheduler implemented in a hardware logic block, and
• a power budget controller including a budget register and a credit register;
• a memory bank having an I/O bus;
• and
• a channel connecting the I/O bus to the memory controller, the channel configured to transmit data between the memory bank and the memory controller and to transmit a command from the memory controller to the memory bank,
• wherein the hardware logic block is configured to:
• determine a first command in a queue to be transmitted to the memory bank;
• estimate a first power consumption value for the first command;
• query the power budget controller to determine if the first power consumption value satisfies a threshold;
• if the first power consumption value satisfies the threshold:
• transmit the first command to the memory bank over the channel;
• and
• transmit a signal to the power budget controller indicating that the first command has been executed;
• and
• if the first power consumption value does not satisfy the threshold:
• begin a timer associated with an idle time of the first command;
• determine a second command in the queue to be transmitted to the memory bank prior to the first command;
• and
• when the timed idle time of the first command exceeds an idle time threshold, assign a priority status to the first command, the priority status stopping granting permission to other commands to be transmitted until the first power consumption value satisfies the threshold.