US 10,972,112 B1 · 50%-duty-cycle consecutive integer frequency divider and phase-locked loop circuit

Abstract

Embodiments described herein relate to a 50%-duty-cycle consecutive integer frequency divider and a phase-locked loop circuit having the frequency divider. The frequency divider includes a consecutive integer frequency divider module having a non-50%-duty-cycle, wherein the module receives a clock signal CLK and an input control signal CB and outputs a consecutive frequency division clock signal CLK1 comprising a non-50% duty cycle; a D flip-flop module for receiving the clock signal CLK and the consecutive frequency division clock signal CLK1 and outputting at least one clock signal CLKx; and a logic OR gate module for receiving the consecutive frequency division clock signal CLK1 and the at least one clock signal CLKx, and outputting an output clock signal CLKout comprising a 50% duty cycle.

Claims20

Dependent claims

A consecutive integer frequency divider of 50%-duty-cycle, comprising:

a consecutive integer frequency divider module, wherein the module has a non-50%-duty-cycle, wherein the module receives a clock signal CLK and an input control signal CB and outputs a consecutive frequency division clock signal CLK comprising a non-50% duty cycle;
a D flip-flop module for receiving the clock signal CLK and the consecutive frequency division clock signal CLK1 and outputting at least one clock signal CLKx, wherein x is an integer greater than 1;
and
a logic OR gate module for receiving the consecutive frequency division clock signal CLK1 and the at least one clock signal CLKx, and outputting an output clock signal CLKout comprising a 50% duty cycle.

1 more element

Dependencies are inferred from the claim text.

50%-duty-cycle consecutive integer frequency divider and phase-locked loop circuit

Life of this patent

50%-duty-cycle consecutive integer frequency divider and phase-locked loop circuit

Life of this patent

Abstract

Claims20