Semiconductor memory device

A semiconductor memory device, comprising:

• lower electrodes, each lower electrode of the lower electrodes surrounding an inner space;
• an upper support layer on top surfaces of the lower electrodes, the upper support layer being in the inner spaces surrounded by the lower electrodes;
• and an upper electrode on the upper support layer, the upper electrode filling first and second regions, the second region penetrating the upper support layer, and the first region extending from the second region into between the lower electrodes, wherein each of the lower electrodes includes:
• a first portion overlapping with the first region, an entirety of a top surface of the first portion not overlapping with the upper support layer in a vertical direction, and a second portion covered by the upper support layer, the second portion having a vertical part and a horizontal part, the horizontal part electrically connects a bottom of the first portion and a bottom of the vertical part of the second portion, and a top surface of the vertical part of the second portion vertically overlapping with the upper support layer.

A semiconductor memory device, comprising:

• lower electrodes, each lower electrode of the lower electrodes surrounding an inner space;
• an upper support layer on top surfaces of the lower electrodes, the upper support layer being inside each one of the inner spaces surrounded by the lower electrodes;
• and
• an upper electrode on the upper support layer, the upper electrode filling first and second regions, the second region penetrating the upper support layer, and the first region extending from the second region into between the lower electrodes,
• wherein each of the lower electrodes includes:
• a first portion overlapping with the first region, an outer sidewall of the first portion being spaced apart from the upper support layer, and
• a second portion covered by the upper support layer, an outer sidewall of the second portion being in contact with the upper support layer,
• wherein sidewalls of the second portion are in contact with the upper support layer, and
• wherein a contact area between the upper support layer and an inner sidewall of the second portion is greater than a contact area between the upper support layer and the outer sidewall of the second portion.