Semiconductor device, electronic component, and electronic device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsTakahiko Ishizu, Hikaru Tamura
Life of this patent
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AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsTakahiko Ishizu, Hikaru Tamura
Estimating the term…
A memory in which a write cycle time is longer than time for one clock cycle can be mounted on a processor. The processor includes a processor core, a bus, and a memory section. The memory section includes a first memory. A cell array of the first memory is composed of gain cells. The processor core is configured to generate a write enable signal. The first memory is configured to generate a wait signal on the basis of the write enable signal. The processor core is configured to delay access to the memory section by time for n clock cycles, on the basis of the wait signal. (n+1) clock cycles can be assigned to a write cycle of the first memory.
A semiconductor device comprising:
A semiconductor device comprising:
A semiconductor device comprising:
Dependencies are inferred from the claim text.