Semiconductor memory device

A semiconductor memory device comprising:

• a substrate;
• a plurality of gate electrodes arranged in a first direction crossing a surface of the substrate;
• a first semiconductor layer including a first portion extending in the first direction and facing the plurality of gate electrodes, and, a second portion nearer to the substrate than the first portion;
• a gate insulating film provided between the gate electrode and the first portion of the first semiconductor layer, and, including a memory portion;
• a wiring portion provided between the substrate and the plurality of gate electrodes, connected to the second portion of the first semiconductor layer, and, extending in a second direction crossing the first direction;
• and
• first and second insulating layers extending in the first direction, connected to the wiring portion, and, including a portion facing the plurality of gate electrodes, wherein
• the wiring portion comprises a second semiconductor layer connected to the second portion of the first semiconductor layer and to the first and second insulating layers,
• the second semiconductor layer includes a plurality of first crystal grains, the first crystal grains being larger than a thickness of the second semiconductor layer in the first direction, one of the plurality of the first crystal grains being a second crystal grain corresponding to the first insulating layer, and, another of the plurality of the first crystal grains being a third crystal grain corresponding to the second insulating layer, and
• a grain boundary between the fifth crystal grain and the sixth crystal grain is provided between the first and second insulating layers in the second direction.