Method for the alignment of photolithographic masks and corresponding process for manufacturing integrated circuits in a wafer of semiconductor material

A photomask alignment method for a manufacturing process of an integrated circuit in a semiconductor material wafer, the method comprising:

• at a first level, defining, by means of a single photolithography process, at least one alignment structure on said wafer, said alignment structure comprising at least a first and a second reference mark;
• and
• at an upper level, higher than the first level, aligning a first field mask relative to said at least one first reference mark;
• and aligning a second field mask, which is used, together with said first field mask, for the photolithography formation of said integrated circuit inside a respective die in said wafer, relative to said at least one second reference mark, so that said first and second field masks are arranged on the wafer adjacent to one another in a first coupling direction, without any mutual overlapping,
• wherein said wafer has a main extension in a horizontal plane (xy), and wherein said alignment structure further comprises a third and a fourth reference marks, which are aligned in pairs with said first and second reference marks along a first (x) and along a second (y) direction of said horizontal plane (xy);
• said first, second, third and fourth reference marks being printed onto the wafer by means of said single photolithography process;
• wherein aligning said first field mask relative to said at least one first reference mark, and aligning said second field mask relative to said at least one second reference mark comprise:
• optically detecting a position of said first and respectively second reference mark on said wafer;
• and aligning said first and respectively second field mask relative to the detected position of said first and respectively second reference mark on said wafer.