Mechanisms for handling uplink grants indicating different physical uplink shared channel starting positions in a same subframe

A system on chip (SoC) to be implemented in a user equipment (UE) the SoC comprising:

• baseband circuitry and memory circuitry, the baseband circuitry to:
• control receipt of Downlink Control Information (DCI) wherein the DCI is to indicate at least two uplink grants for one or more licensed assisted access (LAA) secondary cells (SCells) wherein each of the at least two uplink grants indicate different starting positions for Physical Uplink Shared Channel (PUSCH) transmissions within a same subframe;
• control storage of each of the at least two uplink grants in the memory circuitry;
• and
• align the different starting positions to provide for the UE to transmit uplink transmissions according to the at least two uplink grants while the UE is in a transmission mode.

An apparatus to be employed as a user equipment (UE), the apparatus comprising:

• communication circuitry to receive Downlink Control Information (DCI) wherein the DCI is to indicate at least two uplink grants for one or more licensed assisted access (LAA) secondary cells (SCells) wherein each of the at least two uplink grants indicate different starting positions for Physical Uplink Shared Channel (PUSCH) transmissions within a same subframe;
• and
• processor circuitry communicatively coupled with the communication circuitry, the processor circuitry is to:
• perform a decode attempt on a set of Physical Downlink Control Channel (PDCCH) candidates or a set of enhanced PDCCH (EPDCCH) candidates to obtain the DCI, and
• align the different starting positions to provide for the UE to transmit uplink transmissions according to the at least two uplink grants while the UE is in a transmission mode.