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US 10,873,325 B2Granted
Robust noise immune, low-skew, pulse width retainable glitch-filter
AssigneeTexas Instruments Incorporated
InventorsJhankar Malakar, Srikanth Srinivasan, Devraj Matharampallil Rajagopal
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Abstract
An Inter-IC interface with a glitch filter including at least two cascaded RC filters configured to compensate a signal skew of the data or clock signal received from a data communication or clock signal line, feedback switches configured to pull up or pull down a voltage at an output node of each of the at least two cascaded RC filters, and feedforward transistors configured to condition a respective switches to the feedback switches to accelerate the pull up or the pull down.
Claims19
A glitch filter comprising;
- a first set of CMOS transistors;
- a first resistor-capacitor (RC) filter coupled to the first set of CMOS transistors;
- a second set of CMOS transistors coupled to the first RC filter;
- a second RC filter coupled to the second set of CMOS transistors;
- and
- an output inverter coupled to the second RC filter,
- wherein the first set of CMOS transistors is configured to apply high or low voltage to the first RC filter based on an input signal provided to the glitch filter;
- the first RC filter is configured to generate output voltage based on the high or low voltage applied to the first RC filter by the first set of CMOS transistors;
- the second set of CMOS transistors is configured to apply high or low voltage to the second RC filter based on the output voltage generated by the first RC filter;
- the second RC filter is configured to generate an output signal corresponding to the input signal provided to the first set of CMOS transistors based on the high or low voltage applied to the second RC filter by the second set of CMOS transistors, and
- the output inverter is configured to delay a rising edge or a falling edge of the output signal to compensate a signal skew based on the first set of CMOS transistors or the second set of CMOS transistors.
8 more elements
A glitch filter comprising;
- a set of CMOS transistors;
- a resistor-capacitor (RC) filter coupled to the set of CMOS transistors;
- an output inverter coupled to the RC filter;
- a set of feedback switches coupled to the RC filter and the output inverter;
- and
- a set of feedforward switches coupled to the feedback switches,
- wherein the set of CMOS transistors is configured to apply high or low voltage to the RC filter based on an input signal provided to the glitch filter;
- the RC filter is configured to generate an output signal based on the high or low voltage applied to the RC filter by the set of CMOS transistor;
- and
- the output inverter is configured to invert the output signal and provide the inverted output signal to the set of feedback switches;
- the set of feedback switches is configured to pull up or pull down a voltage of the output signal based on the inverted output signal;
- and
- the set of the feedforward switches is configured to accelerate the pull up or pull down of the voltage by the set of feedback switches based on a delayed input signal.
10 more elements
Dependencies are inferred from the claim text.