Systems and methods for calibrating impedance of a low power voltage-mode transmitter driver

A low-power transmitter for transmitting digital signals from an integrated chip, the transmitter comprising:

• a voltage-mode transmitter driver comprised of a plurality of driver slices, wherein each driver slice includes:
• an up-cell comprising a first resistor and a first transistor, wherein the up-cell is connected to a voltage source and an output end of the voltage-mode transmitter driver;
• and
• a down-cell comprising a second resistor, a second transistor, and a third transistor, wherein the down-cell is connected to the output end of the voltage-mode transmitter driver and a ground;
• a replica circuit comprising a replica of the up-cell and a replica of the down-cell;
• and
• a calibration circuit configured to drive the replica circuit to a desired impedance by adjusting a first gate voltage applied to a first transistor of the replica of the up-cell to be equal to a calibrated first gate voltage and adjusting a second gate voltage applied to a third transistor of the replica of the down-cell to be equal to a calibrated second gate voltage;
• and
• a bias generator configured to:
• receive the calibrated first gate voltage and the calibrated second gate voltage from the calibration circuit;
• and
• apply the calibrated first gate voltage to the first transistor and to the second transistor of each of the plurality of driver slices and apply the calibrated second gate voltage to the third transistor of each of the plurality of driver slices.