Power amplifier circuit

A power amplifier circuit comprising:

• a first transistor configured to amplify a first signal;
• a second transistor configured to amplify a second signal, the second signal corresponding to an output signal of the first transistor;
• a bias circuit configured to supply a bias current or a bias voltage to a base or a gate of the second transistor;
• and
• an attenuation circuit configured to attenuate the first signal or the second signal based on a control voltage supplied from the bias circuit,
• wherein the attenuation circuit comprises:
• a first diode element having an anode to which the control voltage is supplied, and
• a third transistor having a base to which the control voltage is supplied from a cathode of the first diode element, a collector connected to the base of the third transistor and connected to a supply path of the first signal or a supply path of the second signal, and an emitter connected to ground,
• wherein the bias circuit is configured to decrease the supplied control voltage as a power level of the second signal increases, and
• wherein the third transistor is configured to pass part of the first signal or the second signal from the collector of the third transistor to the emitter of the third transistor based on the control voltage.

A power amplifier circuit comprising:

• a first transistor configured to amplify a first signal;
• a second transistor configured to amplify a second signal, the second signal corresponding to an output signal of the first transistor;
• a bias circuit configured to supply a bias current or a bias voltage to a base or a gate of the second transistor;
• and
• an attenuation circuit configured to attenuate the first signal or the second signal based on a control voltage supplied from the bias circuit, wherein the attenuation circuit comprises:
• a third transistor having a collector connected to a supply path of the first signal or a supply path of the second signal, a base to which the control voltage is supplied, and an emitter connected to ground,
• wherein the bias circuit comprises:
• a second diode element and a third diode element connected in series, a bias control voltage being supplied to an anode of the second diode element and a cathode of the third diode element being connected to ground, and
• a fourth transistor having a base connected to the anode of the second diode element and an emitter from which the bias current or the bias voltage is output,
• wherein the control voltage is supplied from an anode of the third diode element to the base of the third transistor, and
• wherein the third transistor is configured to pass part of the first signal or the second signal from the collector of the third transistor to the emitter of the third transistor based on the control voltage.