Voltage follower circuit
AssigneesKabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
InventorNorihiro Ueda
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Abstract
A voltage follower circuit according to an embodiment includes first and second paths, the first path includes a first nMOS transistor and a first pMOS transistor, the second path includes a second nMOS transistor and a second pMOS transistor, an input voltage is supplied to the gate of the first nMOS transistor, an output voltage is supplied to the gate of the second nMOS transistor, a voltage lower than the output voltage is supplied to the gate of the first pMOS transistor, and a voltage lower than the input voltage is supplied to the gate of the second pMOS transistor.
Claims16
A voltage follower circuit comprising a first path for a first differential current and a second path for a second differential current, wherein
- the first path includes a first nMOS transistor having a drain connected to a predetermined potential and a gate supplied with an input voltage, and a first pMOS transistor having a drain connected to a potential lower than the predetermined potential,
- the second path includes a second nMOS transistor having a drain connected to the predetermined potential and a gate supplied with an output voltage, and a second pMOS transistor having a drain connected to a potential lower than the predetermined potential,
- the first pMOS transistor has a gate to which a first voltage lower than the output voltage is supplied, and
- the second pMOS transistor has a gate to which a second voltage lower than the input voltage is supplied, and wherein
- the voltage follower circuit further comprises a capacitor having one end connected to the gate of the first pMOS transistor and another end connected to an output terminal of the output voltage, the capacitor being configured to vary a gate voltage of the first pMOS transistor depending on the output voltage.
Dependencies are inferred from the claim text.