Source and drain formation technique for fin-like field effect transistor

A method comprising:

• forming a fin structure on a substrate, the fin structure including a first sidewall and an opposing second sidewall, wherein a first portion of a dielectric isolation feature is disposed along the first sidewall of the fin structure and a second portion of the dielectric isolation feature is disposed along the second sidewall of the fin structure;
• forming a doped layer along the first sidewall, the second sidewall and a top surface of the fin structure, the top surface of the fin structure facing away from the substrate and extending between the first sidewall and the second sidewall of the fin structure;
• and
• performing a microwave annealing (MWA) process to laterally and vertically diffuse a dopant from the doped layer into the fin structure thereby forming a doped feature in the fin structure, wherein the doped feature extends within the fin structure between the first portion of the dielectric isolation feature and the second portion of the dielectric isolation feature.

A method comprising:

• forming a semiconductor fin structure on a substrate;
• forming a doped layer along a sidewall and a top surface of the fin structure, the top surface facing away from the substrate;
• performing a microwave annealing (MWA) process to laterally and vertically diffuse a dopant from the doped layer into the fin structure thereby forming a uniformly doped feature in the fin structure;
• forming a gate dielectric layer on the fin structure after the performing of the MWA process;
• and
• forming a gate electrode layer on the gate dielectric layer.