Nanosheet substrate isolated source/drain epitaxy by counter-doped bottom epitaxy

A method of forming a semiconductor structure, the method comprising:

• providing a nanosheet stack of alternating nanosheets of a sacrificial semiconductor material nanosheet and a semiconductor channel material nanosheet located on a surface of a semiconductor substrate composed of a semiconductor material of a first conductivity type, wherein a sacrificial gate structure and a dielectric spacer material layer straddle over the nanosheet stack, and the semiconductor substrate has physically exposed recessed surfaces that lay adjacent the sacrificial gate structure and the dielectric spacer material layer, wherein the semiconductor substrate includes a lower region having a first dopant concentration, a middle region having a second dopant concentration and an upper region having a third dopant concentration, wherein the second dopant concentration is less than the first and third dopant concentrations;
• recessing end portions of each of the sacrificial semiconductor material nanosheets to provide a gap between each of the semiconductor channel material nanosheets;
• forming an additional dielectric spacer material layer on the dielectric spacer material layer and within each gap and on the recessed surfaces of the semiconductor substrate;
• removing the additional dielectric spacer material layer from the recessed surfaces to re-expose the recessed surface;
• forming a counter doped semiconductor layer composed of a semiconductor material of a second conductivity type that differs from the first conductivity type on the re-exposed recessed surfaces of the semiconductor substrate;
• physically exposing sidewalls of each semiconductor channel material nanosheet;
• and
• forming a source/drain (S/D) region by epitaxial growth of a semiconductor material on the physically exposed sidewalls of each semiconductor channel material nanosheet, wherein each S/D region is present on a surface of one of the counter doped semiconductor layers.

A method of forming a semiconductor structure, the method comprising:

• providing a nanosheet stack of alternating nanosheets of a sacrificial semiconductor material nanosheet and a semiconductor channel material nanosheet located on a surface of a semiconductor substrate composed of a semiconductor material of a first conductivity type, wherein a sacrificial gate structure and a dielectric spacer material layer straddle over the nanosheet stack, and the semiconductor substrate has physically exposed recessed surfaces that lay adjacent the sacrificial gate structure and the dielectric spacer material layer, wherein each sacrificial semiconductor material nanosheet is composed of a first semiconductor material, and each semiconductor channel material nanosheet is composed of a second semiconductor material that differs from, and has a different etch rate than, the first semiconductor material;
• recessing end portions of each of the sacrificial semiconductor material nanosheets to provide a gap between each of the semiconductor channel material nanosheets;
• forming an additional dielectric spacer material layer on the dielectric spacer material layer and within each gap and on the recessed surfaces of the semiconductor substrate;
• removing the additional dielectric spacer material layer from the recessed surfaces to re-expose the recessed surface;
• forming a counter doped semiconductor layer composed of a semiconductor material of a second conductivity type that differs from the first conductivity type on the re-exposed recessed surfaces of the semiconductor substrate;
• physically exposing sidewalls of each semiconductor channel material nanosheet;
• and
• forming a source/drain (S/D) region by epitaxial growth of a semiconductor material on the physically exposed sidewalls of each semiconductor channel material nanosheet, wherein each S/D region is present on a surface of one of the counter doped semiconductor layers.