Semiconductor devices including capacitor structures having improved area efficiency
AssigneeMicron Technology, Inc.
InventorEric H. Freeman
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Abstract
Semiconductor structures including a plurality of conductive structures having a dielectric material therebetween are disclosed. The thickness of the dielectric material spacing apart the conductive structures may be adjusted to provide optimization of capacitance and voltage threshold. The semiconductor structures may be used as capacitors, for example, in memory devices. Various methods may be used to form such semiconductor structures and capacitors including such semiconductor structures. Memory devices including such capacitors are also disclosed.
Claims20
A semiconductor device, comprising:
- a memory array;
- and
- a capacitor associated with the memory array, the capacitor located over a base material and external to the memory array, the capacitor comprising:
- conductive structures each comprising an upper surface co-planar with an upper surface of the other conductive structures and having a height in a direction perpendicular to the base material, wherein the height is from about 2 times to about 8 times greater than a width of the conductive structure;
- and
- a dielectric material between adjacent conductive structures and having an upper surface co-planar with the upper surfaces of the conductive structures, the dielectric material having a different thickness between a first set of conductive structures than between a second set of conductive structures.
A semiconductor device, comprising:
- at least one of a charge pump circuit and a peripheral circuit comprising a capacitor, the capacitor comprising:
- conductive structures, at least one conductive structure of the conductive structures having a first portion and a second portion perpendicular to the first portion, wherein the first portion and the second portion are vertically oriented with respect to a base material adjacent to the capacitor, an upper surface of the first portion coplanar with an upper surface of the second portion;
- a dielectric material between the conductive structures;
- and
- an oxide material adjacent the conductive structures, a nitride material adjacent the oxide material, and another oxide material adjacent the nitride material.
A semiconductor device, comprising:
- a memory array;
- and
- a capacitor associated with the memory array, the capacitor comprising:
- conductive structures having an aspect ratio within a range from about 2:1 to about 8:1, wherein upper surfaces of the conductive structures are co-planar, the conductive structures electrically isolated from each other;
- a dielectric material between adjacent conductive structures and having an upper surface co-planar with the upper surfaces of the conductive structures;
- and
- an oxide-nitride-oxide material adjacent the conductive structures.
Dependencies are inferred from the claim text.