Semiconductor device

A semiconductor device comprising:

• at least two active regions including a first active region and a second active region, each of the at least two active regions extending in a first direction on a substrate;
• an isolation layer between the at least two active regions;
• at least two gate electrodes including a first gate electrode and a second gate electrode, each of the at least two gate electrodes extending in a second direction crossing the first direction such that the at least two gate electrodes are adjacent to each other in the second direction;
• a buried conductive layer extending in the first direction on the substrate, the buried conductive layer penetrating through at least a portion of the isolation layer;
• an interlayer insulating layer on the isolation layer, the at least two active regions and the buried conductive layer;
• a gate isolation pattern on the buried conductive layer, the gate isolation pattern extending in the first direction between the first gate electrode and the second gate electrode and penetrating through the interlayer insulating layer and including a material different from a material of the interlayer insulating layer;
• at least two source/drain layers including a first source/drain layer and a second source/drain layer on the first active region and the second active region, respectively;
• and
• at least two contact plugs including a first contact plug and a second contact plug on the first source/drain layer and the second source/drain layer, respectively, the first contact plug and the second contact plug including a first contact portion and a second contact portion, respectively, the first contact portion and the second contact portion each extending through the interlayer insulating layer to electrically connect to the buried conductive layer such that the first contact portion and the second contact portion that each extend to the buried conductive layer are in contact with a sidewall of the gate isolation pattern while having a laterally asymmetric shape in the second direction,
• wherein the gate isolation pattern directly contacts at least a portion of the buried conductive layer.

A semiconductor device comprising:

• a first active fin and a second active fin on a substrate, the first active fin and the second active fin extending in a first direction;
• a first isolation layer between a first sidewall of the first active fin and a second sidewall of the second active fin, the first sidewall and second sidewall facing each other;
• a second isolation layer on a third sidewall of the first active fin and on a fourth sidewall of the second active fin, a bottom surface of the second isolation layer at a lower level that a bottom surface of the first isolation layer;
• a gate electrode extending in a second direction crossing the first direction such that the gate electrode intersects the first active fin and the second active fin;
• a source/drain layer on the first active fin and the second active fin, a portion of the source/drain layer overlapping the first isolation layer;
• an interlayer insulating layer on the first isolation layer, the second isolation layer and the source/drain layer;
• a buried conductive layer extending in the first direction on the substrate, the buried conductive layer having a bottom surface at a lower level than the bottom surface of the second isolation layer;
• a gate isolation pattern on the buried conductive layer, the gate isolation pattern penetrating through the interlayer insulating layer;
• and
• a contact plug on the source/drain layer, the contact plug including a contact portion adjacent to the first active fin and extending along a sidewall of the gate isolation pattern to the buried conductive layer and electrically connecting to the buried conductive layer,
• wherein the first sidewall and the third sidewall of the first active fin are opposite each other and the second sidewall and the fourth sidewall of the second active fin are opposite each other, and
• wherein the gate isolation pattern directly contacts at least a portion of the buried conductive layer.