US 10,872,853 B2Granted

Module

AssigneeMurata Manufacturing Co., Ltd.

InventorIssei Yamamoto

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Abstract

A module with high reliability is provided by inhibiting occurrences of air bubbles caused with rise in flow resistance of resin when a sealing resin layer is formed using a die. A module includes a wiring board, components mounted over an upper face of the wiring board, and a sealing resin layer laminated over the upper face. On the upper face, the sealing resin layer includes a high-level region with a long distance from the upper face of the wiring board, a low-level region with a short distance from the upper face, and a level difference region. In a portion included in the wiring board and corresponding to the low-level region and the level difference region, a thin portion is formed so as to be thinner than the remaining portion and overlaps the low-level region at least partially in a plan view.

Claims15

Dependent claims

A module comprising:

a wiring board;
a component mounted over a principal face of the wiring board;
and
a sealing resin layer that is laminated over the principal face of the wiring board and covers the component, wherein:
on an opposite face of the sealing resin layer opposite to the principal face of the wiring board, a high-level region has a long distance from the opposite face to the principal face of the wiring board, a low-level region has a short distance from the opposite face to the principal face of the wiring board, and a level difference region is between the high-level region and the low-level region,
the wiring board includes a thin portion smaller in thickness than a remaining portion,
the component is mounted in the thin portion, and
when viewed in a direction perpendicular to the principal face of the wiring board, at least part of the level difference region and the low-level region of the sealing resin layer overlaps the thin portion.

5 more elements

A module comprising:

a wiring board;
a component mounted over a principal face of the wiring board;
and
a sealing resin layer that is laminated over the principal face of the wiring board and covers the component, wherein:
on an opposite face of the sealing resin layer opposite to the principal face of the wiring board, a high-level region has a long distance from the opposite face to the principal face of the wiring board, a low-level region has a short distance from the opposite face to the principal face of the wiring board, and a level difference region is between the high-level region and the low-level region,
the wiring board includes a thin portion smaller in thickness than a remaining portion,
a difference in thickness between the remaining portion and the thin portion is less than the short distance of the low-level region, and
when viewed in a direction perpendicular to the principal face of the wiring board, at least part of the level difference region and the low-level region of the sealing resin layer overlaps the thin portion.

5 more elements

Dependencies are inferred from the claim text.

Facts

Application: 16/152,920Filed 5 Oct 2018 · continuation
Priority: JP 2016-07859111 Apr 2016
Published: US 2019/0051594 A114 Feb 2019
Granted: 22 Dec 2020
Term ends: Not estimatedThe source records don’t support an estimate.

Classification8 codes

H10W 70/65
Characterised by their interconnections: shapes or dispositions of interconnections
H10W 70/68
Characterised by their insulating layers or insulating parts: shapes or dispositions thereof
H10W 74/016
Manufacture or treatment: using moulds
H10W 74/114
The semiconductor body being completely enclosed: by a substrate and the encapsulations

Family

PCT/JP2017/007702Parent of this continuation · filed 28 Feb 2017
US 2019/0051594 A1Pre-grant publication · published 14 Feb 2019
US 10,872,853 B2This patent

From the US filing history. Foreign family members aren’t listed.

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