Process for manufacturing a flip chip semiconductor package and a corresponding flip chip package

A semiconductor package, comprising:

• a semiconductor die including an active surface that includes a bond pad and an insulation layer, the insulation layer including an opening that exposes the bond pad;
• a lead having a surface facing the active surface of the semiconductor die, the lead having a recess at the surface, a finishing layer located in the recess;
• and
• a conductive bump located in the recess of the lead and between the bond pad and the finishing layer, wherein the conductive bump electrically couples the bond pad to the lead, wherein the surface of the lead overlaps with the insulation layer beyond the opening at the active surface.

A semiconductor package, comprising:

• a semiconductor die including an active surface, wherein active surface of the semiconductor die includes a bond pad and passivation material, wherein the passivation material is around a perimeter of the bond pad such that a central portion of the bond is exposed from the passivation material;
• a lead having a surface that is larger than the central portion of the bond pad, the surface of the lead including a recess at the surface, wherein a finishing layer is located in the recess;
• and
• a conductive bump located in the recess of the lead and between the bond pad and the finishing layer, wherein the conductive bump electrically couples the bond pad to the lead,
• wherein the surface of the lead overlaps and abuts the passivation material at the active surface and outwardly of the conductive bump.