Semiconductor device and manufacturing method thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsKuei-Ming Chang, Chi-Wei Wu, Yi-Chieh Hsieh
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Abstract
A semiconductor device includes a substrate, a shallow trench isolation (STI) structure, a first source/drain, a second source/drain, and an isolation dielectric. The substrate has a semiconductor fin. The STI structure surrounds the semiconductor fin. The first source/drain is embedded in the semiconductor fin. The second source/drain is embedded in the semiconductor fin. The isolation dielectric is between the first and second source/drains and extending into the semiconductor fin. An upper surface of the STI structure is free from coverage of the isolation dielectric.
Claims20
A semiconductor device, comprising:
- a substrate having a semiconductor fin;
- a shallow trench isolation (STI) structure surrounding the semiconductor fin;
- a first source/drain embedded in the semiconductor fin;
- a second source/drain embedded in the semiconductor fin;
- and
- an isolation dielectric between the first and second source/drains and extending into the semiconductor fin, wherein an upper surface of the STI structure is free from coverage of the isolation dielectric.
A semiconductor device, comprising:
- a substrate having a first semiconductor fin;
- a shallow trench isolation (STI) structure surrounding the first semiconductor fin;
- a first source/drain embedded in the first semiconductor fin;
- a second source/drain embedded in the first semiconductor fin;
- and
- an isolation dielectric between the first and second source/drains, extending into the first semiconductor fin, and in contact with a sidewall of the STI structure.
A semiconductor device, comprising:
- a substrate;
- a semiconductor fin on the substrate;
- an isolation structure surrounding the semiconductor fin;
- a gate structure straddling the semiconductor fin;
- a dielectric fin partially embedded in the isolation structure, projecting upwardly above the isolation structure, and in contact with a longitudinal end of the gate structure;
- and
- a dielectric plug partially embedded in the substrate, landing on the dielectric fin, and in contact with the longitudinal end of the gate structure, wherein a bottommost portion of the dielectric plug is lower than a top surface of the substrate.
Dependencies are inferred from the claim text.