Regulation of voltage generation systems

An integrated circuit device, comprising:

• a voltage generation system having a feedback loop comprising a comparator, a capacitive feedback and a selectively enabled resistive feedback;
• a load selectively connected to an output of the voltage generation system;
• and
• a controller, wherein the controller is configured to cause the integrated circuit device to:
• enable the resistive feedback;
• determine whether an output voltage of the voltage generation system has reached a target voltage level;
• determine whether a clock signal has a particular logic level;
• disable the resistive feedback in response to the output voltage reaching the target voltage level and the clock signal having a logic level different than the particular logic level;
• determine whether the output voltage remains below the target voltage level for a particular period of time;
• and
• enable the resistive feedback in response to the output voltage remaining below the target voltage level for the particular period of time.

A memory, comprising:

• an array of memory cells;
• a voltage generation system having a feedback loop comprising a comparator, a capacitive feedback, and a selectively enabled resistive feedback;
• and
• a controller for access of the array of memory cells, wherein the controller, during an access operation of the array of memory cells, is configured to cause the memory to:
• enable the resistive feedback in response to an output voltage level of the voltage generation system being lower than a target voltage level for the access operation for a particular period of time, or a clock signal having a particular logic level;
• and
• disable the resistive feedback in response to the output voltage level being higher than the target voltage level and the clock signal having a logic level different than the particular logic level.