Data writing method, memory control circuit unit and memory storage device
AssigneePhison Electronics Corp.
InventorChih-Kang Yeh
Life of this patent
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Abstract
A data writing method, a memory control circuit unit, and a memory storage device are provided. The method includes: writing a first data and a second data to a first physical erasing unit; copying the first data from the first physical erasing unit to a second physical erasing unit; and copying the second data from the first physical erasing unit to a third physical erasing unit, wherein the memory sub-module to which the second physical erasing unit belongs is different from the memory sub-module to which the third physical erasing unit belongs.
Claims18
A data writing method for a rewritable non-volatile memory module, the rewritable non-volatile memory module includes a plurality of memory sub-modules, each of the plurality of memory sub-modules includes a plurality of physical erasing units, the data writing method comprising:
- obtaining a plurality of data from a host system and temporarily storing the plurality of data in a buffer memory;
- writing a first data and a second data of the plurality of data temporarily stored in the buffer memory to a first physical erasing unit of the plurality of memory sub-modules;
- copying the first data to a second physical erasing unit from the first physical erasing unit;
- copying the second data to a third physical erasing unit from the first physical erasing unit;
- marking a first physical page group in the first physical erasing unit for storing the first data and the second data by using a first bit value;
- marking a second physical page group in the second physical erasing unit for storing the first data by using a second bit value;
- and
- marking a third physical page group in the third physical erasing unit for storing the second data by using the second bit value,
- wherein the memory sub-module to which the second physical erasing unit belongs is different from the memory sub-module to which the third physical erasing unit belongs.
A memory control circuit unit for controlling a rewritable non-volatile memory module, the rewritable non-volatile memory module includes a plurality of memory sub-modules, each of the plurality of memory sub-modules includes a plurality of physical erasing units, the memory control circuit unit comprising:
- a host interface configured to couple to a host system;
- a memory interface configured to couple to the rewritable non-volatile memory module, and the plurality of memory sub-modules are respectively coupled to the memory interface;
- a memory management circuit coupled to the host interface and the memory interface,
- wherein the memory management circuit is configured to obtain a plurality of data from the host system and temporarily storing the plurality of data in a buffer memory,
- wherein the memory management circuit is further configured to write a first data and a second data of the plurality of data temporarily stored in the buffer memory to a first physical erasing unit of the plurality of memory sub-modules,
- wherein the memory management circuit is further configured to copy the first data to a second physical erasing unit from the first physical erasing unit,
- wherein the memory management circuit is further configured to copy the second data to a third physical erasing unit from the first physical erasing unit,
- wherein the memory management circuit is further configured to mark a first physical page group in the first physical erasing unit for storing the first data and the second data by using a first bit value,
- wherein the memory management circuit is further configured to mark a second physical page group in the second physical erasing unit for storing the first data by using a second bit value,
- wherein the memory management circuit is further configured to mark a third physical page group in the third physical erasing unit for storing the second data by using the second bit value,
- wherein the memory sub-module to which the second physical erasing unit belongs is different from the memory sub-module to which the third physical erasing unit belongs.
A memory storage device, comprising:
- a connection interface unit configured to couple to a host system;
- a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module includes a plurality of memory sub-modules, each of the plurality of memory sub-modules includes a plurality of physical erasing units;
- and
- a memory control circuit unit, coupled to the connection interface unit and the rewritable non-volatile memory module, the plurality of memory sub-modules respectively coupled to the memory control circuit unit,
- wherein the memory control circuit unit is configured to obtain a plurality of data from the host system and temporarily storing the plurality of data in a buffer memory,
- wherein the memory control circuit unit is further configured to write a first data and a second data of the plurality of data temporarily stored in the buffer memory to a first physical erasing unit of the plurality of memory sub-modules,
- wherein the memory control circuit unit is further configured to copy the first data to a second physical erasing unit from the first physical erasing unit,
- wherein the memory control circuit unit is further configured to copy the second data to a third physical erasing unit from the first physical erasing unit,
- wherein the memory sub-module to which the second physical erasing unit belongs is different from the memory sub-module to which the third physical erasing unit belongs,
- wherein the memory control circuit unit is further configured to mark a first physical page group in the first physical erasing unit for storing the first data and the second data by using a first bit value,
- wherein the memory control circuit unit is further configured to mark a second physical page group in the second physical erasing unit for storing the first data by using a second bit value, and
- wherein the memory control circuit unit is further configured to mark a third physical page group in the third physical erasing unit for storing the second data by using the second bit value.
Dependencies are inferred from the claim text.