Flexible DLL (delay locked loop) calibration

A computing system, comprising:

• a host controller;
• and
• a three-dimensional stacked memory device coupled to the host controller, the memory device having random access capability and nonvolatile storage cells, and including
• a delay locked loop (DLL) circuit coupled to control timing of an I/O interface;
• and
• a control circuit to selectively enable calibration of the DLL circuit, and when enabled, the control circuit to select from among multiple calibration modes, including a first calibration mode to enable continuous DLL circuit tracking, and a second calibration mode in which tracking of the DLL circuit is started and stopped only in response to a command.

A method for controlling calibration of an I/O (input/output) circuit of a memory device, comprising:

• determining from a register setting whether delay locked loop (DLL) calibration is selectively enabled to control DLL circuit tracking of a DLL circuit of the I/O circuit;
• selecting from among multiple calibration modes when DLL calibration is enabled, including selecting from among a first calibration mode to enable continuous DLL circuit tracking, and a second calibration mode in which tracking of the DLL circuit is started and stopped only in response to a command;
• and
• performing DLL circuit tracking in accordance with the selected calibration mode.