Shift register unit and control method thereof, gate drive circuit and display device

A shift register unit, comprising:

• an input circuit;
• a reset circuit;
• an output circuit;
• a first pull-down control circuit;
• a second pull-down control circuit;
• a first pull-down circuit;
• and
• a second pull-down circuit,
• wherein the input circuit is connected to an input terminal, a first voltage terminal and a pull-up node, and is configured to output a pre-output signal to the pull-up node based on an input signal from the input terminal and a first voltage signal from the first voltage terminal,
• wherein the output circuit is connected to an output terminal, a clock signal terminal and the pull-up node, and is configured to control a potential of the output terminal based on a clock signal from the clock signal terminal and a potential of the pull-up node,
• wherein the reset circuit is connected to a reset signal terminal, a second voltage terminal and the pull-up node, and is configured to output a pre-reset signal to the pull-up node based on a reset signal from the reset signal terminal and a second voltage signal from the second voltage terminal,
• wherein the first pull-down control circuit is connected to a first control signal terminal, a pull-down signal terminal and the pull-up node, and is configured to output a third control signal to the first pull-down circuit based on a first control signal from the first control signal terminal, a pull-down signal from the pull-down signal terminal and the potential of the pull-up node, to control the first pull-down circuit to be switched on or off,
• wherein the second pull-down control circuit is connected to a second control signal terminal, a pull-down signal terminal and the pull-up node, and is configured to output a fourth control signal to the second pull-down circuit based on a second control signal from the second control signal terminal, the pull-down signal from the pull-down signal terminal and the potential of the pull-up node, to control the second pull-down circuit to be switched on or off,
• wherein the first pull-down circuit is connected to the second control signal terminal, the first pull-down control circuit, the pull-up node and the output terminal, and is configured to control the potential of the pull-up node and the potential of the output terminal based on the second control signal responsive to the first pull-down circuit being switched on by the third control signal,
• wherein the second pull-down circuit is connected to the first control signal terminal, the second pull-down control circuit, the pull-up node and the output terminal, and is configured to control the potential of the pull-up node and the potential of the output terminal based on the first control signal responsive to the second pull-down circuit being switched on by the fourth control signal, and
• wherein the first pull-down circuit and the second pull-down circuit are configured to be alternatingly switched on.