Image processor with high throughput internal communication protocol

A method performed by a processor having one or more processing cores and a network implementing a credit counter protocol that requires each sender to receive an acknowledgement from a receiver for a data packet to be transmitted before the sender sends data units belonging to the data packet, the method comprising:

• processing, by a first processing core of the one or more processing cores, program code to generate output data to be sent in a first data packet and a different second data packet;
• initiating, by a transmitter circuit coupling the first processing core to the network, transmitting the first data packet to a first receiver of the processor;
• providing, by the transmitter circuit, a request for the different second data packet to be transmitted to a different second receiver of the processor before a last data unit of the first data packet has been transmitted to the first receiver;
• receiving, by the transmitter circuit, a pre-issued acknowledgement for the different second data packet to be transmitted before the last data unit of the first data packet has been transmitted to the first receiver;
• incrementing a different second receiver-specific credit counter for the second receiver in response to receiving the pre-issued acknowledgement for the different second data packet to be transmitted;
• receiving, by the transmitter circuit, an indication that the last data unit of the first data packet has been consumed by the first receiver;
• incrementing a first receiver-specific credit counter in response to receiving the indication that the last data unit belonging to the first data packet has been consumed by the first receiver;
• and
• sending a first data unit belonging to the second data packet to the different second receiver using credits of the second receiver-specific credit counter incremented due to receiving the pre-issued acknowledgement for the second data packet to be transmitted.

A processor, comprising:

• a network implementing a credit counter protocol that requires each sender to receive an acknowledgement from a receiver for a data packet to be transmitted before the sender sends data units belonging to the data packet;
• one or more processing cores coupled to the network;
• and
• a transmitter circuit coupling a first processing core of the one or more processing cores to the network, the transmitter circuit being configured to transmit data units output by the first processing core into the network, the transmitter circuit comprising means for:
• initiating transmitting a first data packet to a first receiver of the processor,
• providing a request for a different second data packet to be transmitted to a different second receiver of the processor before a last data unit of the first data packet has been transmitted to the first receiver,
• receiving a pre-issued acknowledgement for the different second data packet to be transmitted before the last data unit of the first data packet has been transmitted to the first receiver,
• incrementing a different second receiver-specific credit counter for the second receiver in response to receiving the pre-issued transaction acknowledgement for the different second data packet to be transmitted,
• receiving an indication that the last data unit of the first data packet has been consumed by the first receiver,
• incrementing a first receiver-specific credit counter for the first receiver of the first data packet in response to receiving the indication that the last data unit belonging to the first data packet has been consumed by the first receiver, and
• sending a first data unit belonging to the different second data packet to the different second receiver using credits of the second receiver-specific credit counter incremented due to receiving the pre-issued acknowledgement for the different second data packet to be transmitted.