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US 10,872,172 B2Granted
Apparatus and method for processing digital value
AssigneeICTK Holdings Co., Ltd.
InventorsDong Kyue Kim, Byong Deok Choi
Life of this patent
Estimating the term…
Abstract
Provided is an apparatus for testing randomness of a digital value and processing the digital value. The digital value may include first bit sequences generated by a physically unclonable function (PUF). A grouping unit may generate a plurality of groups by segmenting the first bit sequence, and a processing unit may calculate a second bit sequence from the plurality of groups by performing a logical operation.
Claims12
A digital value processing apparatus, comprising:
- a determining circuit to receive a first digital value having a first bit sequence including a first number of bits, the first digital value being based on a presence or absence of shorts between circuit elements in a physically unclonable function (PUF) circuit, the determining circuit including a reading circuit to read the first bit sequence and calculate a ratio of bit values “1” and “0” included in the first bit sequence;
- a grouping circuit to generate a plurality of groups by segmenting the first bit sequence, a number of groups in the plurality of groups corresponding to a second number of bits in a second digital value, each group in the plurality of groups including a third number of bits;
- and
- a processing circuit to generate the second digital value from the plurality of groups by performing a logical operation, wherein the determining circuit determines the third number of the bits included in each group based on the ratio calculated by the reading circuit, the second number of bits in the second digital value, and a predesignated level of randomness.
1 more element
A digital value processing method, comprising:
- determining, by a determining circuit, a presence or absence of shorts between circuit elements in a physically unclonable function (PUF) circuit;
- receiving, by the determining circuit, a first digital value having a first bit sequence including a first number of bits, the first digital value being based on the presence or the absence of the shorts;
- determining by a reading circuit a ratio of bit values “1” and “0” included in the first bit sequence;
- generating, by a grouping circuit, a plurality of groups by segmenting the first bit sequence, a number of groups in the plurality of groups corresponding to a second number of bits in a second digital value, each group in the plurality of groups including a third number of bits;
- and
- generating, by a processing circuit, the second digital value from the plurality of groups by performing a logical operation, wherein the determining circuit determines the third number of the bits included in each group based on the ratio calculated by the reading circuit, the second number of bits in the second digital value, and a predesignated level of randomness.
3 more elements
Dependencies are inferred from the claim text.