Wide programmable gain receiver data path for single-ended memory interface application

An apparatus comprising:

• a memory interface implemented in a data path configured to receive a data signal and a plurality of selection signals;
• and
• a plurality of impedance branches (i) comprising a group of branches and a separated branch and (ii) configured to adjust an impedance value and a gain of said data path for said data signal in response to said selection signals, wherein (i) said group of branches are controlled in response to said selection signals to select said impedance value and a first gain value in a first mode, (ii) said separated branch replaces one of said plurality of impedance branches in said group of branches in response to said selection signals to select a second gain value in a second mode and (iii) said apparatus is configured to generate one component of a single input differential pair for both high gain values and low gain values.