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US 10,872,010 B2Granted
Error identification in executed code
AssigneeMicron Technology, Inc.
InventorsAntonino Mondello, Alberto Troia
Life of this patent
Estimating the term…
Abstract
The present disclosure includes apparatuses, methods, and systems for error identification on executed code. An embodiment includes memory and circuitry configured to read data stored in a secure array of the memory, identify a different memory having an error correcting code (ECC) corresponding to the read data of the memory, execute an integrity check to compare the ECC to the read data of the memory; and take an action in response to the comparison of the read data of the memory and the ECC, wherein the comparison indicates that the ECC identified an error in the read data of the memory.
Claims19
An apparatus, comprising:
- a memory;
- and
- circuitry associated with the memory, the circuitry configured to:
- read data stored in a secure array of the memory;
- identify a different memory having an error correcting code (ECC) corresponding to the read data of the memory;
- execute an integrity check to compare the ECC to the read data of the memory;
- and
- take an action in response to the comparison of the read data of the memory and the ECC, wherein:
- the comparison indicates that the ECC identified an error in the read data of the memory;
- and
- wherein the memory refrains from applying a correction to the read data of the memory, based on the error identified by the ECC of the different memory.
8 more elements
An apparatus, comprising:
- a memory;
- and
- circuitry associated with the memory, the circuitry configured to:
- read error correcting code (ECC) stored in a secure array of the memory;
- identify a different memory having read data corresponding to the ECC of the memory, wherein the read data of the different memory and the ECC of the memory are read at a start-up of the memory and the different memory;
- execute an integrity check to compare the ECC to the read data of the different memory;
- and
- take an action in response to the comparison of the read data of the different memory and the ECC of the memory, wherein the comparison indicates that the ECC identified an error in the read data of the different memory.
5 more elements
A system, comprising:
- a controller;
- a first memory device in communication with the controller;
- a second memory device in communication with the controller, the controller configured to:
- receive read data from the first memory device;
- receive an error correcting code (ECC) corresponding to the read data of the first memory device;
- execute an integrity check by comparing the read data of the first memory device and the ECC provided by the second memory device, wherein comparing the read data of the first memory device to the ECC provided by the second memory device includes comparing a hash function corresponding to the data and a digest corresponding to the ECC;
- and
- take an action in response to the comparison of the read data of the first memory device and the ECC, wherein the comparison indicates that the ECC identified an error in the read data of the first memory device.
5 more elements
The system of 9, wherein the read data of the first memory device is data associated with a powertrain operation of the vehicle.
A method, comprising:
- receiving read data of a first memory device, wherein receiving the read data of the first memory device includes receiving instructions to execute a routine to operate a powertrain of a host vehicle;
- receiving an error correcting code (ECC) from a second memory device, wherein the ECC corresponds to the read data of the first memory device;
- comparing the ECC from the second memory device to the read data of the first memory device to determine error detected by the ECC;
- determining an integrity of the read data of the first memory based on the comparison of the ECC to the read data of the first memory;
- and
- taking an action in response to the determined integrity of the read data of the first memory.
3 more elements
An apparatus, comprising:
- a memory;
- and
- circuitry associated with the memory, the circuitry configured to:
- read data stored in a secure array of the memory;
- identify a different memory having an error correcting code (ECC) corresponding to the read data of the memory;
- execute an integrity check to compare the ECC to the read data of the memory;
- take an action in response to the comparison of the read data of the memory and the ECC, wherein the comparison indicates that the ECC identified an error in the read data of the memory;
- and
- determine that a correction applied to the error identified by the ECC introduced an additional error to the ECC.
6 more elements
An apparatus, comprising:
- a memory;
- and
- circuitry associated with the memory, the circuitry configured to:
- read data stored in a secure array of the memory;
- identify a different memory having an error correcting code (ECC) corresponding to the read data of the memory;
- execute an integrity check to compare the ECC to the read data of the memory, wherein the integrity check is executed by the memory in response to a start-up process of the memory;
- and
- take an action in response to the comparison of the read data of the memory and the ECC, wherein the comparison indicates that the ECC identified an error in the read data of the memory.
5 more elements
An apparatus, comprising:
- a memory;
- and
- circuitry associated with the memory, the circuitry configured to:
- read data stored in a secure array of the memory;
- identify a different memory having an error correcting code (ECC) corresponding to the read data of the memory
- execute an integrity check to compare the ECC to the read data of the memory;
- take an action in response to the comparison of the read data of the memory and the ECC, wherein the comparison indicates that the ECC identified an error in the read data of the memory;
- and
- determine whether the error identified by the ECC affects an operation of a host device associated with the read data of the memory.
6 more elements
An apparatus, comprising:
- a memory;
- and
- circuitry associated with the memory, the circuitry configured to:
- read error correcting code (ECC) stored in a secure array of the memory;
- identify a different memory having read data corresponding to the ECC of the memory, wherein:
- the memory and the different memory are associated with a host;
- and
- the read data is written to the different memory and the ECC is written to the memory when the host is manufactured;
- execute an integrity check to compare the ECC to the read data of the different memory;
- and
- take an action in response to the comparison of the read data of the different memory and the ECC of the memory, wherein the comparison indicates that the ECC identified an error in the read data of the different memory.
8 more elements
Dependencies are inferred from the claim text.