US 10,871,967 B2 · Register read/write ordering

Abstract

Apparatus and methods are disclosed for controlling execution of register access instructions in a block-based processor architecture using a hardware structure that indicates a relative ordering of register access instruction in an instruction block. In one example of the disclosed technology, a method of operating a processor includes selecting a register access instruction of the plurality of instructions to execute based at least in part on dependencies encoded within a previous block of instructions and on stored data indicating which of the register write instructions have executed for the previous block, and executing the selected instruction. In some examples, one or more of a write mask, a read mask, a register write vector register, or a counter are used to determine register read/write dependences. Based on the encoded dependencies and the masked write vector, the next instruction block can issue when its register dependencies are available.

Claims20

Dependent claims

An apparatus comprising a processor comprising one or more processor cores, each of the cores being configurable to execute one or more instructions, each of the cores comprising:

an execution unit configured to execute register read and write instructions to read from and/or write to, respectively, a register file comprising a plurality of registers;
a hardware structure storing data including:
a register write mask storing data that indicates which registers of the register file a current group of instructions will write to, and
a register read mask storing data that indicates which registers of the register file a next group of instructions will read;
and
a control unit configured to control issuing of individual register read and write instructions of the next group of instructions to the execution unit by comparing the register write mask data to the register read mask data and allowing execution of a respective one of the individual register read and write instructions when the register write mask indicates any register the respective individual instruction is dependent on has been written by the current group of instructions.

3 more elements

Dependencies are inferred from the claim text.

Register read/write ordering

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Register read/write ordering

Life of this patent

Abstract

Claims20