Hardware node having a mixed-signal matrix vector unit

A processor comprising a matrix vector unit and at least one multifunction unit, wherein the at least one multifunction unit is coupled to receive at least a subset of output of the matrix vector unit, the processor configured to:

• receive vector data and matrix data corresponding to at least one layer of a neural network model for processing using the matrix vector unit;
• generate a first set of block-floating point (BFP) format values corresponding to the vector data, wherein the first set of BFP format values have a first shared exponent;
• generate a second set of BFP format values corresponding to the matrix data, wherein the second set of BFP format values have a second shared exponent, and add the first shared exponent and the second shared exponent to generate a third shared exponent;
• convert each of the first set of BFP format values corresponding to the vector data to a first set of analog values and converting each of the second set of BFP format values corresponding to the matrix data to a second set of analog values;
• multiply the first set of analog values and the second set of analog values in an analog domain to generate analog product values;
• convert the analog product values into digital product values and generate BFP result values based on both the digital product values and the third shared exponent;
• and
• convert the BFP result values into floating-point format result values and provide at least a subset of the floating-point result values as an input to the at least one multifunction unit for further processing by the at least one multifunction unit.

A system comprising:

• an input message processor configured to process incoming messages;
• and
• a neural function unit configured to process the incoming messages, the neural function unit comprising:
• a pipeline configured to process instructions, the pipeline including a matrix vector unit, a first multifunction unit, wherein the first multifunction unit is connected to receive an input from the matrix vector unit, a second multifunction unit, wherein the second multifunction unit is connected to receive an output from the first multifunction unit, and a third multifunction unit, wherein the third multifunction unit is connected to receive an output from the second multifunction unit, and wherein the matrix vector unit is further configured to:
• receive vector data and matrix data corresponding to at least one layer of a neural network model for processing using the matrix vector unit,
• generate a first set of block-floating point (BFP) format values corresponding to the vector data, wherein the first set of BFP format values have a first shared exponent,
• generate a second set of BFP format values corresponding to the matrix data, wherein the second set of BFP format values have a second shared exponent, and add the first shared exponent and the second shared exponent to generate a third shared exponent,
• convert each of the first et of BFP format values corresponding to the vector data to a first set of analog values and converting each of the second set of BFP format values corresponding to the matrix data to a second set of analog values,
• multiply the first set of analog values and the second set of analog values in an analog domain to generate analog product values,
• convert the analog product values into digital product values and generate BFP result values based on both the digital product values and the third shared exponent, and
• convert the BFP result values into floating-point format result values and provide at least a subset of the floating-point result values as an input to the first multifunction unit for further processing by the first multifunction unit.