Resource utilization of heterogeneous compute units in electronic design automation

A system comprising:

• a pool of heterogeneous compute units configured to execute an electronic design automation (EDA) application for design or verification of a circuit, wherein the pool of heterogeneous compute units includes a plurality of compute units with differing computing capabilities;
• and
• a resource utilization engine configured to:
• identify an EDA operation to be performed for the EDA application;
• select a compute unit among the pool of heterogeneous compute units to execute the EDA operation based on a determined computing capability specific to the selected compute unit;
• and
• assign an execution of the EDA operation to the selected compute unit,
• wherein the determined computing capability comprises a performance benchmark for the EDA operation specific to the selected compute unit, and
• wherein the resource utilization engine is further configured to obtain, for different EDA operations, performance benchmarks for the plurality of compute units included in the pool of heterogeneous compute units, including by:
• issuing benchmark operations specific to the different EDA operations to each of the plurality of compute units included in the pool of heterogeneous compute units;
• and
• tracking performance of each of the plurality of compute units in executing the issued benchmark operations.

A non-transitory machine-readable medium comprising instructions that, when executed by a processor, cause a system to:

• identify a pool of heterogeneous compute units configured to execute an electronic design automation (EDA) application for design or verification of a circuit, wherein the pool of heterogeneous compute units includes a plurality of compute units with differing computing capabilities;
• identify an EDA operation to be performed for the EDA application;
• select a compute unit among the pool of heterogeneous compute units to execute the EDA operation based on a determined computing capability specific to the selected compute unit;
• and
• assign an execution of the EDA operation to the selected compute unit,
• wherein the determined computing capability comprises a performance benchmark for the EDA operation specific to the selected compute unit, and wherein the instructions, when executed by the processor, further cause the system to obtain, for different EDA operations, performance benchmarks for the plurality of compute units included in the pool of heterogeneous compute units, including by:
• issuing benchmark operations specific to the different EDA operations to each of the plurality of compute units included in the pool of heterogeneous compute units;
• and
• tracking performance of each of the plurality of compute units in executing the issued benchmark operations.